PAPI support for TopDown Events
Background
The Top-Down methodology for performance analysis was proposed by Yasin
in a paper at ISPASS 2014. This methodology provides an iterative way
to explore performance issues on modern out-of-order processors using
hardware performance counters. A subset of counters can be used to find
at a broad level whether performance issues are happening in broad
categories such as "Frontend Bound" or "Backend Bound" and then based on
that different sets of counters can be used to target in on the actual
cause of the issues.
Hardware Support
Top-down was initially proposed by Intel, with events specified for the
Ivy Bridge machines. More recent machines have specifically designed
events made primarily for measuring Top-down. These events can use special
counters to allow conducting top-down without multiplexing, but involve
using the rdpmc or other counters in non-traditional ways that can confuse
traditional tools like PAPI.
The high-level TopDown methodology is generic as long as a processor supports
a common subset of events. There's nothing to stop other architectures
like ARM or AMD from supporting things, and there are writeups to that
effect.
PAPI Support
We have worked on getting PAPI support for this. Initial support is
in PAPI 7.2.
Progress
Our work on this project (as of Summer 2025) is still ongoing.
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