PAPI Counter Validation Tests
My PAPI validation tests have been merged into the PAPI development
tree and will be included with the PAPI 6.0 release.
Older versions of the tests can be found here:
Deterministic Counter Validation
I've done some work attempting to validate the various deterministic
performance counters on a variety of systems. More on this will follow.
I wrote a large x86_64 assembly-language program that attempts to
exercise most x86 instructions.
I then tried to validate the various retired instruction/load/store/etc
counters on 6 different x86_64 machines. You can find the results
of that research here:
Deterministic Counter Work
Valgrind
It would be nice to be able to use DBI tools when doing such validations.
I like using Valgrind, but various instructions aren't supported.
Here's my reminder list of those that need to be implemented:
Missing Instructions: meta bug 253451
- Bug 252695 -- Patch Available
vex amd64->IR: unhandled instruction bytes: 0x66 0x91
xchg 16 bit reg, 16 bit reg. Case 0x91, sz == 2 in
guest_amd64_toIR.c
- Bug 195825
vex amd64->IR: unhandled instruction bytes: 0xD7
xlatb instruction
- Bug 253433
vex amd64->IR: unhandled instruction bytes: 0xC8 0x10 0x0 0x0
enter instruction not supported.
- Bug 253434
vex amd64->IR: unhandled instruction bytes: 0xF 0xA0
Push of a segment register.
- Bug 246525
moves to/from a segment reg not working.
- Bugs 253435,
253657
vex amd64->IR: unhandled instruction bytes: 0x66 0xF 0xB4 0x4 0x25
lfs lgs lss instructions not supported
- Bug 253436
vex amd64->IR: unhandled instruction bytes: 0xF2 0xA6
repne cmps
- Bug 143324
lea with 16-bit destination
- Bug 212352
vex amd64->IR: unhandled instruction bytes: 0xDC 0x14 0x25 0x8C 0x32 0x60
fcoml
- Bug 143325
vex amd64->IR: unhandled instruction bytes: 0xDD 0x34 0x25 0x0 0x33 0x60
fnsave
- Bug 143326
vex amd64->IR: unhandled instruction bytes: 0xDD 0x24 0x25 0x0 0x33 0x60
frstor
- Bug 143323
vex amd64->IR: unhandled instruction bytes: 0xF 0xAE 0xC 0x25 0xF0 0x32
fxrstor
- Bug 253438
vex amd64->IR: unhandled instruction bytes: 0xDF 0x34 0x25 0xB4 0x32 0x60
fbstp
- Bug 253439
vex amd64->IR: unhandled instruction bytes: 0xDF 0x24 0x25 0xA4 0x32 0x60
fbld
- Bug 253440
vex amd64->IR: unhandled instruction bytes: 0xD8 0x14 0x25 0x98 0x32 0x60
fcoms
- Bug 253441
vex amd64->IR: unhandled instruction bytes: 0xD8 0x1C 0x25 0x88 0x32 0x60
fcomps
- Bug 253442
vex amd64->IR: unhandled instruction bytes: 0xD9 0xF6
fdecstp
- Bug 253443
vex amd64->IR: unhandled instruction bytes: 0xDE 0x14 0x25 0x70 0x32 0x60
ficoms
- Bug 253450
vex amd64->IR: unhandled instruction bytes: 0xDA 0x14 0x25 0x70 0x32 0x60
ficoml
- Bug 253449
vex amd64->IR: unhandled instruction bytes: 0xDE 0x1C 0x25 0x60 0x32 0x60
ficomps
- Bug 253448
vex amd64->IR: unhandled instruction bytes: 0xDA 0x1C 0x25 0x60 0x32 0x60
ficompl
- Bug 253446
vex amd64->IR: unhandled instruction bytes: 0xD9 0xD0
fnop
- Bug 253444
vex amd64->IR: unhandled instruction bytes: 0xD9 0xE4
ftst
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