Energy Efficient Buffer Cache Replacement, in Proceedings of 16th Annual Meeting of the IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS'08), Baltimore, MD, Sept 8-10, 2008 (short paper).
Abstract
Power consumption is an increasingly impressing concern for data servers as it directly affects running costs and system reliability. Prior studies have shown most memory space on data servers are used for buffer caching and thus cache replacement becomes critical. This paper investigates the tradeoff between these two interacting factors and proposes three energy-aware buffer cache replacement algorithm. On a cache miss for a new block b in a file f, it evicts an victim block from the most recently accessed memory chip. Simulation results based real-world TPC-R I/O trace show that our algorithm can save up to 12.2% energy with marginal degradation in hit rates.
BibTeX Entry
	@inproceedings{zhu_mascots08b, author = {Jianhui Yue and Yifeng Zhu and Zhao Cai}, title = {Energy Efficient Buffer Cache Replacement}, booktitle = { Proceedings of 16th Annual Meeting of the IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems ({MASCOTS}'08)}, year = {2008}, pages = {???--??}, address = {Baltimore, MD, USA}, }
Full Paper
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Last modified on October 16, 2007