CMSIS-DSP  Version 1.7.0
CMSIS DSP Software Library
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Functions

void arm_var_f32 (const float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
 Variance of the elements of a floating-point vector. More...
 
void arm_var_q15 (const q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
 Variance of the elements of a Q15 vector. More...
 
void arm_var_q31 (const q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
 Variance of the elements of a Q31 vector. More...
 

Description

Calculates the variance of the elements in the input vector. The underlying algorithm used is the direct method sometimes referred to as the two-pass method:

    Result = sum(element - meanOfElements)^2) / numElement - 1
    meanOfElements = ( pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] ) / blockSize

There are separate functions for floating point, Q31, and Q15 data types.

Function Documentation

void arm_var_f32 ( const float32_t pSrc,
uint32_t  blockSize,
float32_t pResult 
)
Parameters
[in]pSrcpoints to the input vector
[in]blockSizenumber of samples in input vector
[out]pResultvariance value returned here
Returns
none
void arm_var_q15 ( const q15_t pSrc,
uint32_t  blockSize,
q15_t pResult 
)
Parameters
[in]pSrcpoints to the input vector
[in]blockSizenumber of samples in input vector
[out]pResultvariance value returned here
Returns
none
Scaling and Overflow Behavior
The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format.
void arm_var_q31 ( const q31_t pSrc,
uint32_t  blockSize,
q31_t pResult 
)
Parameters
[in]pSrcpoints to the input vector
[in]blockSizenumber of samples in input vector
[out]pResultvariance value returned here
Returns
none
Scaling and Overflow Behavior
The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, which is then downshifted by 8 bits which yields 1.23, and intermediate multiplication yields a 2.46 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a 16 guard bits. There is no saturation on intermediate additions. If the accumulator overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(blockSize)-8 bits, as a total of blockSize additions are performed internally. After division, internal variables should be Q18.46 Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.