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CMSIS-Driver
Version 2.7.1
Peripheral Interface for Middleware and Application Code
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CMSIS-Driver
Version 2.7.1
Peripheral Interface for Middleware and Application Code
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Data Structures | |
| struct | ARM_SAI_STATUS |
| SAI Status. More... | |
| struct | ARM_SAI_CAPABILITIES |
| SAI Driver Capabilities. More... | |
| struct | ARM_DRIVER_SAI |
| Access structure of the SAI Driver. More... | |
Macros | |
| #define | ARM_SAI_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,1) /* API version */ |
| #define | ARM_SAI_CONTROL_Msk (0xFFU) |
| #define | ARM_SAI_CONFIGURE_TX (0x01U) |
| Configure Transmitter; arg1 and arg2 provide additional configuration. More... | |
| #define | ARM_SAI_CONFIGURE_RX (0x02U) |
| Configure Receiver; arg1 and arg2 provide additional configuration. More... | |
| #define | ARM_SAI_CONTROL_TX (0x03U) |
| Control Transmitter; arg1.0: 0=disable (default), 1=enable; arg1.1: mute. More... | |
| #define | ARM_SAI_CONTROL_RX (0x04U) |
| Control Receiver; arg1.0: 0=disable (default), 1=enable. More... | |
| #define | ARM_SAI_MASK_SLOTS_TX (0x05U) |
| Mask Transmitter slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default. More... | |
| #define | ARM_SAI_MASK_SLOTS_RX (0x06U) |
| Mask Receiver slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default. More... | |
| #define | ARM_SAI_ABORT_SEND (0x07U) |
| Abort ARM_SAI_Send. More... | |
| #define | ARM_SAI_ABORT_RECEIVE (0x08U) |
| Abort ARM_SAI_Receive. More... | |
| #define | ARM_SAI_MODE_Pos 8 |
| #define | ARM_SAI_MODE_Msk (1U << ARM_SAI_MODE_Pos) |
| #define | ARM_SAI_MODE_MASTER (1U << ARM_SAI_MODE_Pos) |
| Master Mode. More... | |
| #define | ARM_SAI_MODE_SLAVE (0U << ARM_SAI_MODE_Pos) |
| Slave Mode (default) More... | |
| #define | ARM_SAI_SYNCHRONIZATION_Pos 9 |
| #define | ARM_SAI_SYNCHRONIZATION_Msk (1U << ARM_SAI_SYNCHRONIZATION_Pos) |
| #define | ARM_SAI_ASYNCHRONOUS (0U << ARM_SAI_SYNCHRONIZATION_Pos) |
| Asynchronous (default) More... | |
| #define | ARM_SAI_SYNCHRONOUS (1U << ARM_SAI_SYNCHRONIZATION_Pos) |
| Synchronous. More... | |
| #define | ARM_SAI_PROTOCOL_Pos 10 |
| #define | ARM_SAI_PROTOCOL_Msk (7U << ARM_SAI_PROTOCOL_Pos) |
| #define | ARM_SAI_PROTOCOL_USER (0U << ARM_SAI_PROTOCOL_Pos) |
| User defined (default) More... | |
| #define | ARM_SAI_PROTOCOL_I2S (1U << ARM_SAI_PROTOCOL_Pos) |
| I2S. More... | |
| #define | ARM_SAI_PROTOCOL_MSB_JUSTIFIED (2U << ARM_SAI_PROTOCOL_Pos) |
| MSB (left) justified. More... | |
| #define | ARM_SAI_PROTOCOL_LSB_JUSTIFIED (3U << ARM_SAI_PROTOCOL_Pos) |
| LSB (right) justified. More... | |
| #define | ARM_SAI_PROTOCOL_PCM_SHORT (4U << ARM_SAI_PROTOCOL_Pos) |
| PCM with short frame. More... | |
| #define | ARM_SAI_PROTOCOL_PCM_LONG (5U << ARM_SAI_PROTOCOL_Pos) |
| PCM with long frame. More... | |
| #define | ARM_SAI_PROTOCOL_AC97 (6U << ARM_SAI_PROTOCOL_Pos) |
| AC'97. More... | |
| #define | ARM_SAI_DATA_SIZE_Pos 13 |
| #define | ARM_SAI_DATA_SIZE_Msk (0x1FU << ARM_SAI_DATA_SIZE_Pos) |
| #define | ARM_SAI_DATA_SIZE(n) ((((n)-1)&0x1FU) << ARM_SAI_DATA_SIZE_Pos) |
| Data size in bits (8..32) More... | |
| #define | ARM_SAI_BIT_ORDER_Pos 18 |
| #define | ARM_SAI_BIT_ORDER_Msk (1U << ARM_SAI_BIT_ORDER_Pos) |
| #define | ARM_SAI_MSB_FIRST (0U << ARM_SAI_BIT_ORDER_Pos) |
| Data is transferred with MSB first (default) More... | |
| #define | ARM_SAI_LSB_FIRST (1U << ARM_SAI_BIT_ORDER_Pos) |
| Data is transferred with LSB first; User Protocol only (ignored otherwise) More... | |
| #define | ARM_SAI_MONO_MODE (1U << 19) |
| Mono Mode (only for I2S, MSB/LSB justified) More... | |
| #define | ARM_SAI_COMPANDING_Pos 20 |
| #define | ARM_SAI_COMPANDING_Msk (3U << ARM_SAI_COMPANDING_Pos) |
| #define | ARM_SAI_COMPANDING_NONE (0U << ARM_SAI_COMPANDING_Pos) |
| No companding (default) More... | |
| #define | ARM_SAI_COMPANDING_A_LAW (2U << ARM_SAI_COMPANDING_Pos) |
| A-Law companding. More... | |
| #define | ARM_SAI_COMPANDING_U_LAW (3U << ARM_SAI_COMPANDING_Pos) |
| u-Law companding More... | |
| #define | ARM_SAI_CLOCK_POLARITY_Pos 23 |
| #define | ARM_SAI_CLOCK_POLARITY_Msk (1U << ARM_SAI_CLOCK_POLARITY_Pos) |
| #define | ARM_SAI_CLOCK_POLARITY_0 (0U << ARM_SAI_CLOCK_POLARITY_Pos) |
| Drive on falling edge, Capture on rising edge (default) More... | |
| #define | ARM_SAI_CLOCK_POLARITY_1 (1U << ARM_SAI_CLOCK_POLARITY_Pos) |
| Drive on rising edge, Capture on falling edge. More... | |
| #define | ARM_SAI_MCLK_PIN_Pos 24 |
| #define | ARM_SAI_MCLK_PIN_Msk (3U << ARM_SAI_MCLK_PIN_Pos) |
| #define | ARM_SAI_MCLK_PIN_INACTIVE (0U << ARM_SAI_MCLK_PIN_Pos) |
| MCLK not used (default) More... | |
| #define | ARM_SAI_MCLK_PIN_OUTPUT (1U << ARM_SAI_MCLK_PIN_Pos) |
| MCLK is output (Master only) More... | |
| #define | ARM_SAI_MCLK_PIN_INPUT (2U << ARM_SAI_MCLK_PIN_Pos) |
| MCLK is input (Master only) More... | |
| #define | ARM_SAI_FRAME_LENGTH_Pos 0 |
| #define | ARM_SAI_FRAME_LENGTH_Msk (0x3FFU << ARM_SAI_FRAME_LENGTH_Pos) |
| #define | ARM_SAI_FRAME_LENGTH(n) ((((n)-1)&0x3FFU) << ARM_SAI_FRAME_LENGTH_Pos) |
| Frame length in bits (8..1024); default depends on protocol and data. More... | |
| #define | ARM_SAI_FRAME_SYNC_WIDTH_Pos 10 |
| #define | ARM_SAI_FRAME_SYNC_WIDTH_Msk (0xFFU << ARM_SAI_FRAME_SYNC_WIDTH_Pos) |
| #define | ARM_SAI_FRAME_SYNC_WIDTH(n) ((((n)-1)&0xFFU) << ARM_SAI_FRAME_SYNC_WIDTH_Pos) |
| Frame Sync width in bits (1..256); default=1; User Protocol only (ignored otherwise) More... | |
| #define | ARM_SAI_FRAME_SYNC_POLARITY_Pos 18 |
| #define | ARM_SAI_FRAME_SYNC_POLARITY_Msk (1U << ARM_SAI_FRAME_SYNC_POLARITY_Pos) |
| #define | ARM_SAI_FRAME_SYNC_POLARITY_HIGH (0U << ARM_SAI_FRAME_SYNC_POLARITY_Pos) |
| Frame Sync is active high (default); User Protocol only (ignored otherwise) More... | |
| #define | ARM_SAI_FRAME_SYNC_POLARITY_LOW (1U << ARM_SAI_FRAME_SYNC_POLARITY_Pos) |
| Frame Sync is active low; User Protocol only (ignored otherwise) More... | |
| #define | ARM_SAI_FRAME_SYNC_EARLY (1U << 19) |
| Frame Sync one bit before the first bit of the frame; User Protocol only (ignored otherwise) More... | |
| #define | ARM_SAI_SLOT_COUNT_Pos 20 |
| #define | ARM_SAI_SLOT_COUNT_Msk (0x1FU << ARM_SAI_SLOT_COUNT_Pos) |
| #define | ARM_SAI_SLOT_COUNT(n) ((((n)-1)&0x1FU) << ARM_SAI_SLOT_COUNT_Pos) |
| Number of slots in frame (1..32); default=1; User Protocol only (ignored otherwise) More... | |
| #define | ARM_SAI_SLOT_SIZE_Pos 25 |
| #define | ARM_SAI_SLOT_SIZE_Msk (3U << ARM_SAI_SLOT_SIZE_Pos) |
| #define | ARM_SAI_SLOT_SIZE_DEFAULT (0U << ARM_SAI_SLOT_SIZE_Pos) |
| Slot size is equal to data size (default) More... | |
| #define | ARM_SAI_SLOT_SIZE_16 (1U << ARM_SAI_SLOT_SIZE_Pos) |
| Slot size = 16 bits; User Protocol only (ignored otherwise) More... | |
| #define | ARM_SAI_SLOT_SIZE_32 (3U << ARM_SAI_SLOT_SIZE_Pos) |
| Slot size = 32 bits; User Protocol only (ignored otherwise) More... | |
| #define | ARM_SAI_SLOT_OFFSET_Pos 27 |
| #define | ARM_SAI_SLOT_OFFSET_Msk (0x1FU << ARM_SAI_SLOT_OFFSET_Pos) |
| #define | ARM_SAI_SLOT_OFFSET(n) (((n)&0x1FU) << ARM_SAI_SLOT_OFFSET_Pos) |
| Offset of first data bit in slot (0..31); default=0; User Protocol only (ignored otherwise) More... | |
| #define | ARM_SAI_AUDIO_FREQ_Msk (0x0FFFFFU) |
| Audio frequency mask. More... | |
| #define | ARM_SAI_MCLK_PRESCALER_Pos 20 |
| #define | ARM_SAI_MCLK_PRESCALER_Msk (0xFFFU << ARM_SAI_MCLK_PRESCALER_Pos) |
| #define | ARM_SAI_MCLK_PRESCALER(n) ((((n)-1)&0xFFFU) << ARM_SAI_MCLK_PRESCALER_Pos) |
| MCLK prescaler; Audio_frequency = MCLK/n; n = 1..4096 (default=1) More... | |
| #define | ARM_SAI_ERROR_SYNCHRONIZATION (ARM_DRIVER_ERROR_SPECIFIC - 1) |
| Specified Synchronization not supported. More... | |
| #define | ARM_SAI_ERROR_PROTOCOL (ARM_DRIVER_ERROR_SPECIFIC - 2) |
| Specified Protocol not supported. More... | |
| #define | ARM_SAI_ERROR_DATA_SIZE (ARM_DRIVER_ERROR_SPECIFIC - 3) |
| Specified Data size not supported. More... | |
| #define | ARM_SAI_ERROR_BIT_ORDER (ARM_DRIVER_ERROR_SPECIFIC - 4) |
| Specified Bit order not supported. More... | |
| #define | ARM_SAI_ERROR_MONO_MODE (ARM_DRIVER_ERROR_SPECIFIC - 5) |
| Specified Mono mode not supported. More... | |
| #define | ARM_SAI_ERROR_COMPANDING (ARM_DRIVER_ERROR_SPECIFIC - 6) |
| Specified Companding not supported. More... | |
| #define | ARM_SAI_ERROR_CLOCK_POLARITY (ARM_DRIVER_ERROR_SPECIFIC - 7) |
| Specified Clock polarity not supported. More... | |
| #define | ARM_SAI_ERROR_AUDIO_FREQ (ARM_DRIVER_ERROR_SPECIFIC - 8) |
| Specified Audio frequency not supported. More... | |
| #define | ARM_SAI_ERROR_MCLK_PIN (ARM_DRIVER_ERROR_SPECIFIC - 9) |
| Specified MCLK Pin setting not supported. More... | |
| #define | ARM_SAI_ERROR_MCLK_PRESCALER (ARM_DRIVER_ERROR_SPECIFIC - 10) |
| Specified MCLK Prescaler not supported. More... | |
| #define | ARM_SAI_ERROR_FRAME_LENGHT (ARM_DRIVER_ERROR_SPECIFIC - 11) |
| Specified Frame length not supported. More... | |
| #define | ARM_SAI_ERROR_FRAME_SYNC_WIDTH (ARM_DRIVER_ERROR_SPECIFIC - 12) |
| Specified Frame Sync width not supported. More... | |
| #define | ARM_SAI_ERROR_FRAME_SYNC_POLARITY (ARM_DRIVER_ERROR_SPECIFIC - 13) |
| Specified Frame Sync polarity not supported. More... | |
| #define | ARM_SAI_ERROR_FRAME_SYNC_EARLY (ARM_DRIVER_ERROR_SPECIFIC - 14) |
| Specified Frame Sync early not supported. More... | |
| #define | ARM_SAI_ERROR_SLOT_COUNT (ARM_DRIVER_ERROR_SPECIFIC - 15) |
| Specified Slot count not supported. More... | |
| #define | ARM_SAI_ERROR_SLOT_SIZE (ARM_DRIVER_ERROR_SPECIFIC - 16) |
| Specified Slot size not supported. More... | |
| #define | ARM_SAI_ERROR_SLOT_OFFESET (ARM_DRIVER_ERROR_SPECIFIC - 17) |
| Specified Slot offset not supported. More... | |
| #define | ARM_SAI_EVENT_SEND_COMPLETE (1U << 0) |
| Send completed. More... | |
| #define | ARM_SAI_EVENT_RECEIVE_COMPLETE (1U << 1) |
| Receive completed. More... | |
| #define | ARM_SAI_EVENT_TX_UNDERFLOW (1U << 2) |
| Transmit data not available. More... | |
| #define | ARM_SAI_EVENT_RX_OVERFLOW (1U << 3) |
| Receive data overflow. More... | |
| #define | ARM_SAI_EVENT_FRAME_ERROR (1U << 4) |
| Sync Frame error in Slave mode (optional) More... | |
Typedefs | |
| typedef void(* | ARM_SAI_SignalEvent_t )(uint32_t event) |
| Pointer to ARM_SAI_SignalEvent : Signal SAI Event. More... | |
| #define ARM_SAI_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,1) /* API version */ |
| #define ARM_SAI_CONTROL_Msk (0xFFU) |
| #define ARM_SAI_MODE_Pos 8 |
| #define ARM_SAI_MODE_Msk (1U << ARM_SAI_MODE_Pos) |
| #define ARM_SAI_SYNCHRONIZATION_Pos 9 |
| #define ARM_SAI_SYNCHRONIZATION_Msk (1U << ARM_SAI_SYNCHRONIZATION_Pos) |
| #define ARM_SAI_PROTOCOL_Pos 10 |
| #define ARM_SAI_PROTOCOL_Msk (7U << ARM_SAI_PROTOCOL_Pos) |
| #define ARM_SAI_DATA_SIZE_Pos 13 |
| #define ARM_SAI_DATA_SIZE_Msk (0x1FU << ARM_SAI_DATA_SIZE_Pos) |
| #define ARM_SAI_BIT_ORDER_Pos 18 |
| #define ARM_SAI_BIT_ORDER_Msk (1U << ARM_SAI_BIT_ORDER_Pos) |
| #define ARM_SAI_COMPANDING_Pos 20 |
| #define ARM_SAI_COMPANDING_Msk (3U << ARM_SAI_COMPANDING_Pos) |
| #define ARM_SAI_CLOCK_POLARITY_Pos 23 |
| #define ARM_SAI_CLOCK_POLARITY_Msk (1U << ARM_SAI_CLOCK_POLARITY_Pos) |
| #define ARM_SAI_MCLK_PIN_Pos 24 |
| #define ARM_SAI_MCLK_PIN_Msk (3U << ARM_SAI_MCLK_PIN_Pos) |
| #define ARM_SAI_FRAME_LENGTH_Pos 0 |
| #define ARM_SAI_FRAME_LENGTH_Msk (0x3FFU << ARM_SAI_FRAME_LENGTH_Pos) |
| #define ARM_SAI_FRAME_SYNC_WIDTH_Pos 10 |
| #define ARM_SAI_FRAME_SYNC_WIDTH_Msk (0xFFU << ARM_SAI_FRAME_SYNC_WIDTH_Pos) |
| #define ARM_SAI_FRAME_SYNC_POLARITY_Pos 18 |
| #define ARM_SAI_FRAME_SYNC_POLARITY_Msk (1U << ARM_SAI_FRAME_SYNC_POLARITY_Pos) |
| #define ARM_SAI_SLOT_COUNT_Pos 20 |
| #define ARM_SAI_SLOT_COUNT_Msk (0x1FU << ARM_SAI_SLOT_COUNT_Pos) |
| #define ARM_SAI_SLOT_SIZE_Pos 25 |
| #define ARM_SAI_SLOT_SIZE_Msk (3U << ARM_SAI_SLOT_SIZE_Pos) |
| #define ARM_SAI_SLOT_OFFSET_Pos 27 |
| #define ARM_SAI_SLOT_OFFSET_Msk (0x1FU << ARM_SAI_SLOT_OFFSET_Pos) |
| #define ARM_SAI_AUDIO_FREQ_Msk (0x0FFFFFU) |
Audio frequency mask.
| #define ARM_SAI_MCLK_PRESCALER_Pos 20 |
| #define ARM_SAI_MCLK_PRESCALER_Msk (0xFFFU << ARM_SAI_MCLK_PRESCALER_Pos) |
