CMSIS-Driver
Version 2.7.1
Peripheral Interface for Middleware and Application Code
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Specify various options for sending commands to the card and the expected response. More...
Macros | |
#define | ARM_MCI_RESPONSE_NONE (0UL << ARM_MCI_RESPONSE_Pos) |
No response expected (default) More... | |
#define | ARM_MCI_RESPONSE_SHORT (1UL << ARM_MCI_RESPONSE_Pos) |
Short response (48-bit) More... | |
#define | ARM_MCI_RESPONSE_SHORT_BUSY (2UL << ARM_MCI_RESPONSE_Pos) |
Short response with busy signal (48-bit) More... | |
#define | ARM_MCI_RESPONSE_LONG (3UL << ARM_MCI_RESPONSE_Pos) |
Long response (136-bit) More... | |
#define | ARM_MCI_RESPONSE_INDEX (1UL << 2) |
Check command index in response. More... | |
#define | ARM_MCI_RESPONSE_CRC (1UL << 3) |
Check CRC in response. More... | |
#define | ARM_MCI_WAIT_BUSY (1UL << 4) |
Wait until busy before sending the command. More... | |
#define | ARM_MCI_TRANSFER_DATA (1UL << 5) |
Activate Data transfer. More... | |
#define | ARM_MCI_CARD_INITIALIZE (1UL << 6) |
Execute Memory Card initialization sequence. More... | |
#define | ARM_MCI_INTERRUPT_COMMAND (1UL << 7) |
Send Interrupt command (CMD40 - MMC only) More... | |
#define | ARM_MCI_INTERRUPT_RESPONSE (1UL << 8) |
Send Interrupt response (CMD40 - MMC only) More... | |
#define | ARM_MCI_BOOT_OPERATION (1UL << 9) |
Execute Boot operation (MMC only) More... | |
#define | ARM_MCI_BOOT_ALTERNATIVE (1UL << 10) |
Execute Alternative Boot operation (MMC only) More... | |
#define | ARM_MCI_BOOT_ACK (1UL << 11) |
Expect Boot Acknowledge (MMC only) More... | |
#define | ARM_MCI_CCSD (1UL << 12) |
Send Command Completion Signal Disable (CCSD) for CE-ATA device. More... | |
#define | ARM_MCI_CCS (1UL << 13) |
Expect Command Completion Signal (CCS) for CE-ATA device. More... | |
Specify various options for sending commands to the card and the expected response.
ARM_MCI_xxx flags are sent with the function ARM_MCI_SendCommand as the parameter flag. It controls the behavior of the command sent to the card and provides information about the expected response from the card.
The following codes are defined:
#define ARM_MCI_RESPONSE_NONE (0UL << ARM_MCI_RESPONSE_Pos) |
No response expected (default)
#define ARM_MCI_RESPONSE_SHORT (1UL << ARM_MCI_RESPONSE_Pos) |
Short response (48-bit)
#define ARM_MCI_RESPONSE_SHORT_BUSY (2UL << ARM_MCI_RESPONSE_Pos) |
Short response with busy signal (48-bit)
#define ARM_MCI_RESPONSE_LONG (3UL << ARM_MCI_RESPONSE_Pos) |
Long response (136-bit)
#define ARM_MCI_RESPONSE_INDEX (1UL << 2) |
Check command index in response.
#define ARM_MCI_RESPONSE_CRC (1UL << 3) |
Check CRC in response.
#define ARM_MCI_WAIT_BUSY (1UL << 4) |
Wait until busy before sending the command.
#define ARM_MCI_TRANSFER_DATA (1UL << 5) |
Activate Data transfer.
#define ARM_MCI_CARD_INITIALIZE (1UL << 6) |
Execute Memory Card initialization sequence.
#define ARM_MCI_INTERRUPT_COMMAND (1UL << 7) |
Send Interrupt command (CMD40 - MMC only)
#define ARM_MCI_INTERRUPT_RESPONSE (1UL << 8) |
Send Interrupt response (CMD40 - MMC only)
#define ARM_MCI_BOOT_OPERATION (1UL << 9) |
Execute Boot operation (MMC only)
#define ARM_MCI_BOOT_ALTERNATIVE (1UL << 10) |
Execute Alternative Boot operation (MMC only)
#define ARM_MCI_BOOT_ACK (1UL << 11) |
Expect Boot Acknowledge (MMC only)
#define ARM_MCI_CCSD (1UL << 12) |
Send Command Completion Signal Disable (CCSD) for CE-ATA device.
#define ARM_MCI_CCS (1UL << 13) |
Expect Command Completion Signal (CCS) for CE-ATA device.